This invention relates to a reactive ion etching (RIE) apparatus, and more particularly, to a novel anode for such an apparatus for providing uniform and controllable anisotropic etching of workpieces.
In the manufacture of semiconductor devices considerable interest exists in employing dry processing techniques for patterning workpieces such as semiconductor wafers. The interest in dry etching stems from their generally better resolution and improved dimensional and shape control capabilities relative to etching using wet chemicals. Among the dry etching techniques, reactive ion etching has been favored, especially with ultrafine (i.e., submicron dimension) resolution demanded by devices of the very large scale integration (VLSI) and ultra large scale integration (ULSI) type because of its compatibility to achieve high rates and extremely well-defined edges on etched materials.
The requirements for high volume handling of semiconductor wafers has resulted in the use of multiple wafer batch RIE systems. In order to enhance the throughput and to simultaneously process large number of wafers without human intervention the RIE systems have been automated. In an automated RIE system the wafers are automatically transported, loaded, processed and unloaded.
The RIE system (see FIG. 1 and refer for a more complete description to U.S. Pat. No. 4,384,938 issued to Desilets et al and assigned to the present assignee) typically consists of a container 10 wherein are positioned an anode 12 and cathode 14. The cathode is negatively biased relative to the anode and the walls of container 10 by means of a radio frequency (RF) potential. The wafer to be etched is covered by the suitable mask and then placed directIy on the cathode 12. A chemically reactive gas such as CF.sub.4, CHF.sub.3, CClF.sub.3 and SF.sub.6 either directly or mixed with O.sub.2, N.sub.2, He, or Ar is introduced via the tube 16 and nozzle 18 into the container 10 maintained at a pressure, typically, in the millitorr range. The anode 12 is provided with gas pump-out holes 20. Pump-out is achieved by permitting the gas to be uniformly pumped through opening 22 in the chamber. The electric field established in the region between the anode 12 and the cathode 14 will dissociate the reactive gas forming a plasma therein. Chemically reactive gas ions in the plasma are accelerated to the cathode and thereby impinge on the surface to be etched. The surface is etched both by chemical interaction with the active ions and by momentum transfer of the ions striking the surface. By virtue of the electric field attracting the ions to the cathode, the ions strike the surface to be etched predominantly in a direction vertical to the surface so that the process produces well-defined vertically etched side walls.
The RIE system has been used for processing a variety of materials including semiconductors such as mono- and poly-crystalline silicon and GaAs, insulators such as SiO.sub.2 Si.sub.3 N.sub.4 and photoresist, metals such as Al, Au, Pt, Cr, Ti, Ta and their alloys and refractory metal silicides. The processing in this context includes patterning layers of one or more of the aforementioned conductive and insulative materials and etching shallow and/or deep straight-walled trenches in semiconductor bodies.
One of the problems of the prior art RIE systems, particularly in the context of etching silicon, is lack of uniformity of etching across the entire cathode diameter. Such nonuniform etching is deleterious to the yield of the semiconductor devices formed on the wafer. Attempts have been made to solve the nonuniform etching problem. U.S. Pat. No. 4,384,938 issued to Desilets et al suggests rendering the internal surfaces of the plasma container free of any apertures, holes, recesses, or the like, having an opening dimension larger than one tenth the thickness of plasma dark space. U.S. Pat. No. 4,230,515 issued to Zajac suggests radially decreasing the spacing between the cathode and the anode wherein the gap between the electrodes is greatest at the center and smallest at the circumference of the electrodes. U.S. Pat. No. 4,340,461 issued to Hendricks et al and assigned to the present assignee suggests employing a plasma enhancing baffle plate conductively coupled to and provided in close proximity to the anode to form a constricted chamber region between the anode and the baffle plate. By providing apertures in the plasma enhancing baffle plate with opening dimensions considerably greater than the plasma Debye length the plasma glow in the region between the baffle plate and the anode is enhanced thereby improving etching uniformity. Despite these prior art improvements the need for better uniformity in etching of wafers dispersed across the cathode plate dimension remains particularly due to the insatiable demands of the microelectronics industry for higher yields, particularly, in conjunction with higher etch selectivity and rate. Moreover, with the trend toward progressively larger wafers and utilization of single wafer RIE etch systems, the microelectronics industry is also demanding extremely high etch uniformity over a single wafer.
A second problem with the prior art RIE systems is generation of contaminants during the etching process. To elaborate on this, the prior art systems when operated at a given applied RF voltage and power invariably give rise to a high plasma potential and a low DC potential (the potential difference between the plasma and the cathode). As a result of the high plasma potential the chamber walls and other metallic, organic and other materials used in the construction of the interior RIE system components will be sputtered off. These sputtered materials deposit on the workpieces deleteriously affecting the yield.
The low DC potential renders the RIE system extremely dependent on wafer loading to provide the desired etching capabilities and the consequent limitation of the process window for etching. Focusing specifically on etching silicon, for a given set of etch parameters the etching process is highly sensitive to the amount of silicon exposed for etching. A slight variation from a pre-adjusted silicon loading has a drastic effect on the etching process. Such a variation produces a voltage shift of a few volts which when the DC voltage is low becomes of significant proportion. In general, the amount of silicon exposed for etching is simply the product of the number of silicon wafers to be etched and the percent of silicon exposed per wafer. Thus, in practice, this necessitates operating the RIE system always with a pre-fixed, exact number of wafers and accurately knowing the percentage of silicon exposed per wafer. This narrow process window is unsuitable for high throughput and precise replication processing of wafers typical of a manufacturing line.
Associated with the limitation on the process window and high plasma potential problems discussed above, specifically in the context of etching deep trenches in silicon, is the black silicon (also known as rough silicon) problem. Black silicon is formation of silicon spikes at the bottom of the trench due to uneven etching of the trench floor. The spikes appear black when viewed under a microscope, hence the terminology. FIG. 2, which is a scanning electron micrograph of a silicon trench formed using the prior art RIE apparatus exemplifies the black silicon formation. Black silicon tends to not only electrically short out adjacent silicon regions separated by the trench, but also give rise to crystalline defects in the subsequently applied dielectric-fill material (such as polysilicon and polyimide) thereby destroying the basic dielectric isolation purpose of the trench.
Accordingly, it is an object of the invention to provide a RIE apparatus which allows an enhanced etch uniformity across a given workpiece.
It is another object of the invention to provide an RIE apparatus which enables excellent etch uniformity across the entire cathode plate.
It is still another object of the invention to provide an RIE apparatus which is free of wafer load dependency.
It is yet another object of the invention to provide an RIE apparatus which is free of black silicon, contamination control and poor etch selectivity problems.